Only in gcc/src/: autom4te.cache
Only in gcc/src/boehm-gc: autom4te.cache
diff -r -U 4 gcc-compare/gcc-current/ChangeLog.linaro gcc/src/ChangeLog.linaro
--- gcc-compare/gcc-current/ChangeLog.linaro	2013-07-04 23:23:28.516639571 +0100
+++ gcc/src/ChangeLog.linaro	2013-07-04 23:25:29.996642581 +0100
@@ -1,7 +1,7 @@
-2013-06-14  Rob Savoye  <rob.savoye@linaro.org>
+2013-06-11  Rob Savoye  <rob.savoye@linaro.org>
 
-	GCC Linaro 4.7-2013.06-1 released.
+	GCC Linaro 4.7-2013.06 released.
 
 	gcc/
 	* LINARO-VERSION: Update.
 
diff -r -U 4 gcc-compare/gcc-current/contrib/gcc_build gcc/src/contrib/gcc_build
--- gcc-compare/gcc-current/contrib/gcc_build	2013-07-04 23:23:28.176639562 +0100
+++ gcc/src/contrib/gcc_build	2013-07-04 23:25:29.996642581 +0100
@@ -145,9 +145,9 @@
     changedir ${OBJDIR}
 
     # Bootstrap the compiler
     echo "Building: ${MAKE} ${MAKE_BOOTSTRAP_OPTIONS} bootstrap"
-    eval ${MAKE} ${MAKE_BOOTSTRAP_OPTIONS} bootstrap || \
+    eval ${MAKE} -j8 ${MAKE_BOOTSTRAP_OPTIONS} bootstrap || \
 	error "Could not bootstrap the compiler"
 }
 
 # Test GCC.
@@ -158,10 +158,10 @@
     # Go to the object directory.
     changedir ${OBJDIR}
 
     echo "Running tests...  This will take a while."
-    eval \${MAKE} -k ${MAKE_CHECK_OPTIONS} check
-    ${DESTINATION}/contrib/test_summary
+    #eval \${MAKE} -k ${MAKE_CHECK_OPTIONS} check
+    #${DESTINATION}/contrib/test_summary
 }
 
 # Export the GCC source tree.
 
diff -r -U 4 gcc-compare/gcc-current/fixincludes/fixincl.x gcc/src/fixincludes/fixincl.x
--- gcc-compare/gcc-current/fixincludes/fixincl.x	2013-07-04 23:23:28.496639570 +0100
+++ gcc/src/fixincludes/fixincl.x	2013-07-04 23:25:30.000000000 +0100
@@ -1,13 +1,13 @@
 /*  -*- buffer-read-only: t -*- vi: set ro:
- * 
+ *
  * DO NOT EDIT THIS FILE   (fixincl.x)
- * 
- * It has been AutoGen-ed  March 26, 2012 at 10:53:21 AM by AutoGen 5.10
+ *
+ * It has been AutoGen-ed  July  4, 2013 at 11:25:30 PM by AutoGen 5.17.3
  * From the definitions    inclhack.def
  * and the template file   fixincl
  */
-/* DO NOT SVN-MERGE THIS FILE, EITHER Mon Mar 26 10:53:21 EDT 2012
+/* DO NOT SVN-MERGE THIS FILE, EITHER Thu Jul  4 23:25:30 BST 2013
  *
  * You must regenerate it.  Use the ./genfixes script.
  *
  *
Only in gcc/src/gcc: autom4te.cache
diff -r -U 4 gcc-compare/gcc-current/gcc/BASE-VER gcc/src/gcc/BASE-VER
--- gcc-compare/gcc-current/gcc/BASE-VER	2013-07-04 23:23:26.948639532 +0100
+++ gcc/src/gcc/BASE-VER	2012-09-20 10:39:50.000000000 +0100
@@ -1 +1 @@
-4.7.4
+4.7.3
diff -r -U 4 gcc-compare/gcc-current/gcc/ChangeLog gcc/src/gcc/ChangeLog
--- gcc-compare/gcc-current/gcc/ChangeLog	2013-07-04 23:23:26.804639528 +0100
+++ gcc/src/gcc/ChangeLog	2013-07-04 23:25:30.120642584 +0100
@@ -1,4 +1,32 @@
+2013-06-07  Uros Bizjak  <ubizjak@gmail.com>
+
+	Backport from mainline
+	2013-06-10  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use
+	cmp_code to construct REG_EQUAL note.
+
+	Backport from mainline
+	2013-06-05  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/alpha/alpha.c (alpha_emit_conditional_move): Swap all
+	GE, GT, GEU and GTU compares, modulo DImode compares with zero.
+
+	Backport from mainline
+	2013-05-23  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/57379
+	* config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE.
+	* config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct
+	REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec.
+
+2013-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/57568
+	* config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure
+	that operands[2] doesn't overlap with operands[0].
+
 2013-05-22  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/57356
 	* config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups
@@ -214,13 +242,8 @@
 	PR target/55487
 	* config/pa/pa.c (legitimize_pic_address): Before incrementing label
 	nuses, make sure we have a label.
 
-2013-04-11  Richard Biener  <rguenther@suse.de>
-
-	* BASE-VER: Set to 4.7.4.
-	* DEV-PHASE: Set to prerelease.
-
 2013-04-11  Release Manager
 
 	* GCC 4.7.3 released.
 
diff -r -U 4 gcc-compare/gcc-current/gcc/config/alpha/alpha.c gcc/src/gcc/config/alpha/alpha.c
--- gcc-compare/gcc-current/gcc/config/alpha/alpha.c	2013-07-04 23:23:26.884639530 +0100
+++ gcc/src/gcc/config/alpha/alpha.c	2013-07-04 23:25:30.124642584 +0100
@@ -2657,14 +2657,14 @@
       cmov_code = EQ;
       break;
 
     case GE:  case GT:  case GEU:  case GTU:
-      /* These must be swapped.  */
-      if (op1 != CONST0_RTX (cmp_mode))
-	{
-	  code = swap_condition (code);
-	  tem = op0, op0 = op1, op1 = tem;
-	}
+      /* These normally need swapping, but for integer zero we have
+	 special patterns that recognize swapped operands.  */
+      if (cmp_mode == DImode && op1 == const0_rtx)
+	break;
+      code = swap_condition (code);
+      tem = op0, op0 = op1, op1 = tem;
       break;
 
     default:
       gcc_unreachable ();
@@ -3024,14 +3024,11 @@
   operands[0] = op0;
   operands[1] = op1;
   out = gen_reg_rtx (DImode);
 
-  /* What's actually returned is -1,0,1, not a proper boolean value,
-     so use an EXPR_LIST as with a generic libcall instead of a 
-     comparison type expression.  */
-  note = gen_rtx_EXPR_LIST (VOIDmode, op1, NULL_RTX);
-  note = gen_rtx_EXPR_LIST (VOIDmode, op0, note);
-  note = gen_rtx_EXPR_LIST (VOIDmode, func, note);
+  /* What's actually returned is -1,0,1, not a proper boolean value.  */
+  note = gen_rtx_fmt_ee (cmp_code, VOIDmode, op0, op1);
+  note = gen_rtx_UNSPEC (DImode, gen_rtvec (1, note), UNSPEC_XFLT_COMPARE);
   alpha_emit_xfloating_libcall (func, out, operands, 2, note);
 
   return out;
 }
diff -r -U 4 gcc-compare/gcc-current/gcc/config/alpha/alpha.md gcc/src/gcc/config/alpha/alpha.md
--- gcc-compare/gcc-current/gcc/config/alpha/alpha.md	2013-07-04 23:23:26.884639530 +0100
+++ gcc/src/gcc/config/alpha/alpha.md	2013-07-04 23:25:30.124642584 +0100
@@ -24,8 +24,9 @@
 
 ;; Uses of UNSPEC in this file:
 
 (define_c_enum "unspec" [
+  UNSPEC_XFLT_COMPARE
   UNSPEC_ARG_HOME
   UNSPEC_LDGP1
   UNSPEC_INSXH
   UNSPEC_MSKXH
diff -r -U 4 gcc-compare/gcc-current/gcc/config/i386/i386.md gcc/src/gcc/config/i386/i386.md
--- gcc-compare/gcc-current/gcc/config/i386/i386.md	2013-07-04 23:23:26.908639531 +0100
+++ gcc/src/gcc/config/i386/i386.md	2013-07-04 23:25:30.128642584 +0100
@@ -17193,8 +17193,9 @@
    (set (reg FLAGS_REG) (compare (match_dup 0) (const_int 0)))]
   "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
    && peep2_reg_dead_p (4, operands[0])
    && !reg_overlap_mentioned_p (operands[0], operands[1])
+   && !reg_overlap_mentioned_p (operands[0], operands[2])
    && (<MODE>mode != QImode
        || immediate_operand (operands[2], QImode)
        || q_regs_operand (operands[2], QImode))
    && ix86_match_ccmode (peep2_next_insn (3),
@@ -17257,8 +17258,9 @@
    && (<MODE>mode != QImode
        || immediate_operand (operands[2], SImode)
        || q_regs_operand (operands[2], SImode))
    && !reg_overlap_mentioned_p (operands[0], operands[1])
+   && !reg_overlap_mentioned_p (operands[0], operands[2])
    && ix86_match_ccmode (peep2_next_insn (3),
 			 (GET_CODE (operands[3]) == PLUS
 			  || GET_CODE (operands[3]) == MINUS)
 			 ? CCGOCmode : CCNOmode)"
diff -r -U 4 gcc-compare/gcc-current/gcc/DATESTAMP gcc/src/gcc/DATESTAMP
--- gcc-compare/gcc-current/gcc/DATESTAMP	2013-07-04 23:23:26.876639530 +0100
+++ gcc/src/gcc/DATESTAMP	2013-07-04 23:25:30.120642584 +0100
@@ -1 +1 @@
-20130603
+20130614
diff -r -U 4 gcc-compare/gcc-current/gcc/DEV-PHASE gcc/src/gcc/DEV-PHASE
--- gcc-compare/gcc-current/gcc/DEV-PHASE	2013-07-04 23:23:26.932639531 +0100
+++ gcc/src/gcc/DEV-PHASE	2013-04-11 08:57:28.000000000 +0100
@@ -1 +0,0 @@
-prerelease
Only in gcc/src/gcc/doc: aot-compile.1
Only in gcc/src/gcc/doc: cpp.1
Only in gcc/src/gcc/doc: cpp.info
Only in gcc/src/gcc/doc: cppinternals.info
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/extend.texi gcc/src/gcc/doc/extend.texi
--- gcc-compare/gcc-current/gcc/doc/extend.texi	2013-07-04 23:23:26.916639531 +0100
+++ gcc/src/gcc/doc/extend.texi	2013-03-30 11:10:22.000000000 +0000
@@ -8574,19 +8574,14 @@
 Similar to @code{__builtin_powi}, except the argument and return types
 are @code{long double}.
 @end deftypefn
 
-@deftypefn {Built-in Function} int16_t __builtin_bswap16 (int16_t x)
+@deftypefn {Built-in Function} int32_t __builtin_bswap32 (int32_t x)
 Returns @var{x} with the order of the bytes reversed; for example,
-@code{0xaabb} becomes @code{0xbbaa}.  Byte here always means
+@code{0xaabbccdd} becomes @code{0xddccbbaa}.  Byte here always means
 exactly 8 bits.
 @end deftypefn
 
-@deftypefn {Built-in Function} int32_t __builtin_bswap32 (int32_t x)
-Similar to @code{__builtin_bswap16}, except the argument and return types
-are 32-bit.
-@end deftypefn
-
 @deftypefn {Built-in Function} int64_t __builtin_bswap64 (int64_t x)
 Similar to @code{__builtin_bswap32}, except the argument and return types
 are 64-bit.
 @end deftypefn
@@ -13470,8 +13465,9 @@
 float __builtin_rsqrtf (float);
 double __builtin_recipdiv (double, double);
 double __builtin_rsqrt (double);
 long __builtin_bpermd (long, long);
+int __builtin_bswap16 (int);
 @end smallexample
 
 The @code{vec_rsqrt}, @code{__builtin_rsqrt}, and
 @code{__builtin_rsqrtf} functions generate multiple instructions to
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/fragments.texi gcc/src/gcc/doc/fragments.texi
--- gcc-compare/gcc-current/gcc/doc/fragments.texi	2013-07-04 23:23:26.920639531 +0100
+++ gcc/src/gcc/doc/fragments.texi	2013-01-14 16:32:37.000000000 +0000
@@ -126,31 +126,8 @@
 @smallexample
 *mthumb/*mhard-float*
 @end smallexample
 
-@findex MULTILIB_REQUIRED
-@item MULTILIB_REQUIRED
-Sometimes when there are only a few combinations are required, it would
-be a big effort to come up with a @code{MULTILIB_EXCEPTIONS} list to
-cover all undesired ones.  In such a case, just listing all the required
-combinations in @code{MULTILIB_REQUIRED} would be more straightforward.
-
-The way to specify the entries in @code{MULTILIB_REQUIRED} is same with
-the way used for @code{MULTILIB_EXCEPTIONS}, only this time what are
-required will be specified.  Suppose there are multiple sets of
-@code{MULTILIB_OPTIONS} and only two combinations are required, one
-for ARMv7-M and one for ARMv7-R with hard floating-point ABI and FPU, the
-@code{MULTILIB_REQUIRED} can be set to:
-@smallexample
-@code{MULTILIB_REQUIRED} =  mthumb/march=armv7-m
-@code{MULTILIB_REQUIRED} += march=armv7-r/mfloat-abi=hard/mfpu=vfpv3-d16
-@end smallexample
-
-The @code{MULTILIB_REQUIRED} can be used together with
-@code{MULTILIB_EXCEPTIONS}.  The option combinations generated from
-@code{MULTILIB_OPTIONS} will be filtered by @code{MULTILIB_EXCEPTIONS}
-and then by @code{MULTILIB_REQUIRED}.
-
 @findex MULTILIB_EXTRA_OPTS
 @item MULTILIB_EXTRA_OPTS
 Sometimes it is desirable that when building multiple versions of
 @file{libgcc.a} certain options should always be passed on to the
Only in gcc/src/gcc/doc: fsf-funding.7
Only in gcc/src/gcc/doc: g++.1
Only in gcc/src/gcc/doc: gc-analyze.1
Only in gcc/src/gcc/doc: gcc.1
Only in gcc/src/gcc/doc: gcc.info
Only in gcc/src/gcc/doc: gccinstall.info
Only in gcc/src/gcc/doc: gccint.info
Only in gcc/src/gcc/doc: gcj.1
Only in gcc/src/gcc/doc: gcj-dbtool.1
Only in gcc/src/gcc/doc: gcj.info
Only in gcc/src/gcc/doc: gcov.1
Only in gcc/src/gcc/doc: gfdl.7
Only in gcc/src/gcc/doc: gfortran.1
Only in gcc/src/gcc/doc: gij.1
Only in gcc/src/gcc/doc: gpl.7
Only in gcc/src/gcc/doc: grmic.1
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/install.texi gcc/src/gcc/doc/install.texi
--- gcc-compare/gcc-current/gcc/doc/install.texi	2013-07-04 23:23:26.920639531 +0100
+++ gcc/src/gcc/doc/install.texi	2013-01-14 16:32:37.000000000 +0000
@@ -1046,17 +1046,8 @@
 libraries to support different target variants, calling
 conventions, etc.@: should not be built.  The default is to build a
 predefined set of them.
 
-@item --enable-multiarch
-Specify whether to enable or disable multiarch support.  The default is
-to check for glibc start files in a multiarch location, and enable it
-if the files are found.  The auto detection is enabled for native builds,
-and for cross builds configured with @option{--with-sysroot}, and without
-@option{--with-native-system-header-dir}.
-More documentation about multiarch can be found at
-@uref{http://wiki.debian.org/Multiarch}.
-
 Some targets provide finer-grained control over which multilibs are built
 (e.g., @option{--disable-softfloat}):
 @table @code
 @item arm-*-*
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/invoke.texi gcc/src/gcc/doc/invoke.texi
--- gcc-compare/gcc-current/gcc/doc/invoke.texi	2013-07-04 23:23:26.920639531 +0100
+++ gcc/src/gcc/doc/invoke.texi	2013-03-30 11:10:22.000000000 +0000
@@ -402,17 +402,15 @@
 -fshrink-wrap -fsignaling-nans -fsingle-precision-constant @gol
 -fsplit-ivs-in-unroller -fsplit-wide-types -fstack-protector @gol
 -fstack-protector-all -fstrict-aliasing -fstrict-overflow @gol
 -fthread-jumps -ftracer -ftree-bit-ccp @gol
--ftree-builtin-call-dce -ftree-ccp -ftree-ch @gol
--ftree-coalesce-inline-vars -ftree-coalesce-vars -ftree-copy-prop @gol
+-ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop @gol
 -ftree-copyrename -ftree-dce -ftree-dominator-opts -ftree-dse @gol
 -ftree-forwprop -ftree-fre -ftree-loop-if-convert @gol
 -ftree-loop-if-convert-stores -ftree-loop-im @gol
 -ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns @gol
 -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol
--ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta @gol
--ftree-reassoc @gol
+-ftree-parallelize-loops=@var{n} -ftree-pre -ftree-pta -ftree-reassoc @gol
 -ftree-sink -ftree-sra -ftree-switch-conversion -ftree-tail-merge @gol
 -ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp @gol
 -funit-at-a-time -funroll-all-loops -funroll-loops @gol
 -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol
@@ -461,17 +459,8 @@
 @c This list is ordered alphanumerically by subsection name.
 @c Try and put the significant identifier (CPU or system) first,
 @c so users have a clue at guessing where the ones they want will be.
 
-@emph{AArch64 Options}
-@gccoptlist{-mbig-endian  -mlittle-endian @gol
--mgeneral-regs-only @gol
--mcmodel=tiny  -mcmodel=small  -mcmodel=large @gol
--mstrict-align @gol
--momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer @gol
--mtls-dialect=desc  -mtls-dialect=traditional @gol
--march=@var{name}  -mcpu=@var{name}  -mtune=@var{name}}
-
 @emph{Adapteva Epiphany Options}
 @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol
 -mbranch-cost=@var{num} -mcmove -mnops=@var{num} -msoft-cmpsf @gol
 -msplit-lohi -mpost-inc -mpost-modify -mstack-offset=@var{num} @gol
@@ -504,10 +493,9 @@
 -mcaller-super-interworking  -mcallee-super-interworking @gol
 -mtp=@var{name} -mtls-dialect=@var{dialect} @gol
 -mword-relocations @gol
 -mfix-cortex-m3-ldrd @gol
--munaligned-access @gol
--mneon-for-64bits}
+-munaligned-access}
 
 @emph{AVR Options}
 @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
 -mcall-prologues -mint8 -mno-interrupts -mrelax -mshort-calls @gol
@@ -6248,10 +6236,10 @@
 @opindex O3
 Optimize yet more.  @option{-O3} turns on all optimizations specified
 by @option{-O2} and also turns on the @option{-finline-functions},
 @option{-funswitch-loops}, @option{-fpredictive-commoning},
-@option{-fgcse-after-reload}, @option{-ftree-vectorize},
-@option{-ftree-partial-pre} and @option{-fipa-cp-clone} options.
+@option{-fgcse-after-reload}, @option{-ftree-vectorize} and
+@option{-fipa-cp-clone} options.
 
 @item -O0
 @opindex O0
 Reduce compilation time and make debugging produce the expected
@@ -7044,13 +7032,8 @@
 @opindex ftree-pre
 Perform partial redundancy elimination (PRE) on trees.  This flag is
 enabled by default at @option{-O2} and @option{-O3}.
 
-@item -ftree-partial-pre
-@opindex ftree-partial-pre
-Make partial redundancy elimination (PRE) more aggressive.  This flag is
-enabled by default at @option{-O3}.
-
 @item -ftree-forwprop
 @opindex ftree-forwprop
 Perform forward propagation on trees.  This flag is enabled by default
 at @option{-O} and higher.
@@ -7444,26 +7427,8 @@
 temporaries to other variables at copy locations, usually resulting in
 variable names which more closely resemble the original variables.  This flag
 is enabled by default at @option{-O} and higher.
 
-@item -ftree-coalesce-inlined-vars
-Tell the copyrename pass (see @option{-ftree-copyrename}) to attempt to
-combine small user-defined variables too, but only if they were inlined
-from other functions.  It is a more limited form of
-@option{-ftree-coalesce-vars}.  This may harm debug information of such
-inlined variables, but it will keep variables of the inlined-into
-function apart from each other, such that they are more likely to
-contain the expected values in a debugging session.  This was the
-default in GCC versions older than 4.7.
-
-@item -ftree-coalesce-vars
-Tell the copyrename pass (see @option{-ftree-copyrename}) to attempt to
-combine small user-defined variables too, instead of just compiler
-temporaries.  This may severely limit the ability to debug an optimized
-program compiled with @option{-fno-var-tracking-assignments}.  In the
-negated form, this flag prevents SSA coalescing of user variables,
-including inlined ones.  This option is enabled by default.
-
 @item -ftree-ter
 @opindex ftree-ter
 Perform temporary expression replacement during the SSA->normal phase.  Single
 use/single def temporaries are replaced at their use location with their
@@ -10363,9 +10328,8 @@
 @c It should be the same order and spelling as these options are listed
 @c in Machine Dependent Options
 
 @menu
-* AArch64 Options::
 * Adapteva Epiphany Options::
 * ARM Options::
 * AVR Options::
 * Blackfin Options::
@@ -10572,127 +10536,8 @@
 purpose.  The default is @option{-m1reg-none}.
 
 @end table
 
-@node AArch64 Options
-@subsection AArch64 Options
-@cindex AArch64 Options
-
-These options are defined for AArch64 implementations:
-
-@table @gcctabopt
-
-@item -mbig-endian
-@opindex mbig-endian
-Generate big-endian code.  This is the default when GCC is configured for an
-@samp{aarch64_be-*-*} target.
-
-@item -mgeneral-regs-only
-@opindex mgeneral-regs-only
-Generate code which uses only the general registers.
-
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate little-endian code.  This is the default when GCC is configured for an
-@samp{aarch64-*-*} but not an @samp{aarch64_be-*-*} target.
-
-@item -mcmodel=tiny
-@opindex mcmodel=tiny
-Generate code for the tiny code model.  The program and its statically defined
-symbols must be within 1GB of each other.  Pointers are 64 bits.  Programs can
-be statically or dynamically linked.  This model is not fully implemented and
-mostly treated as "small".
-
-@item -mcmodel=small
-@opindex mcmodel=small
-Generate code for the small code model.  The program and its statically defined
-symbols must be within 4GB of each other.  Pointers are 64 bits.  Programs can
-be statically or dynamically linked.  This is the default code model.
-
-@item -mcmodel=large
-@opindex mcmodel=large
-Generate code for the large code model.  This makes no assumptions about
-addresses and sizes of sections.  Pointers are 64 bits.  Programs can be
-statically linked only.
-
-@item -mstrict-align
-@opindex mstrict-align
-Do not assume that unaligned memory references will be handled by the system.
-
-@item -momit-leaf-frame-pointer
-@item -mno-omit-leaf-frame-pointer
-@opindex momit-leaf-frame-pointer
-@opindex mno-omit-leaf-frame-pointer
-Omit or keep the frame pointer in leaf functions.  The former behaviour is the
-default.
-
-@item -mtls-dialect=desc
-@opindex mtls-dialect=desc
-Use TLS descriptors as the thread-local storage mechanism for dynamic accesses
-of TLS variables.  This is the default.
-
-@item -mtls-dialect=traditional
-@opindex mtls-dialect=traditional
-Use traditional TLS as the thread-local storage mechanism for dynamic accesses
-of TLS variables.
-
-@item -march=@var{name}
-@opindex march
-Specify the name of the target architecture, optionally suffixed by one or
-more feature modifiers.  This option has the form
-@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the
-only value for @var{arch} is @samp{armv8-a}.  The possible values for
-@var{feature} are documented in the sub-section below.
-
-Where conflicting feature modifiers are specified, the right-most feature is
-used.
-
-GCC uses this name to determine what kind of instructions it can emit when
-generating assembly code.  This option can be used in conjunction with or
-instead of the @option{-mcpu=} option.
-
-@item -mcpu=@var{name}
-@opindex mcpu
-Specify the name of the target processor, optionally suffixed by one or more
-feature modifiers.  This option has the form
-@option{-mcpu=@var{cpu}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the
-possible values for @var{cpu} are @samp{generic}, @samp{large}.  The
-possible values for @var{feature} are documented in the sub-section
-below.
-
-Where conflicting feature modifiers are specified, the right-most feature is
-used.
-
-GCC uses this name to determine what kind of instructions it can emit when
-generating assembly code.
-
-@item -mtune=@var{name}
-@opindex mtune
-Specify the name of the processor to tune the performance for.  The code will
-be tuned as if the target processor were of the type specified in this option,
-but still using instructions compatible with the target processor specified
-by a @option{-mcpu=} option.  This option cannot be suffixed by feature
-modifiers.
-
-@end table
-
-@subsubsection @option{-march} and @option{-mcpu} feature modifiers
-@cindex @option{-march} feature modifiers
-@cindex @option{-mcpu} feature modifiers
-Feature modifiers used with @option{-march} and @option{-mcpu} can be one
-the following:
-
-@table @samp
-@item crypto
-Enable Crypto extension.  This implies Advanced SIMD is enabled.
-@item fp
-Enable floating-point instructions.
-@item simd
-Enable Advanced SIMD instructions.  This implies floating-point instructions
-are enabled.  This is the default for all current possible values for options
-@option{-march} and @option{-mcpu=}.
-@end table
-
 @node ARM Options
 @subsection ARM Options
 @cindex ARM options
 
@@ -11102,13 +10947,8 @@
 setting of this option.  If unaligned access is enabled then the
 preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be
 defined.
 
-@item -mneon-for-64bits
-@opindex mneon-for-64bits
-Enables using Neon to handle scalar 64-bits operations. This is
-disabled by default since the cost of moving data from core registers
-to Neon is high.
 @end table
 
 @node AVR Options
 @subsection AVR Options
Only in gcc/src/gcc/doc: jcf-dump.1
Only in gcc/src/gcc/doc: jv-convert.1
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/md.texi gcc/src/gcc/doc/md.texi
--- gcc-compare/gcc-current/gcc/doc/md.texi	2013-07-04 23:23:26.916639531 +0100
+++ gcc/src/gcc/doc/md.texi	2012-08-27 19:51:44.000000000 +0100
@@ -1652,64 +1652,8 @@
 table heading for each architecture is the definitive reference for
 the meanings of that architecture's constraints.
 
 @table @emph
-@item AArch64 family---@file{config/aarch64/constraints.md}
-@table @code
-@item k
-The stack pointer register (@code{SP})
-
-@item w
-Floating point or SIMD vector register
-
-@item I
-Integer constant that is valid as an immediate operand in an @code{ADD}
-instruction
-
-@item J
-Integer constant that is valid as an immediate operand in a @code{SUB}
-instruction (once negated)
-
-@item K
-Integer constant that can be used with a 32-bit logical instruction
-
-@item L
-Integer constant that can be used with a 64-bit logical instruction
-
-@item M
-Integer constant that is valid as an immediate operand in a 32-bit @code{MOV}
-pseudo instruction. The @code{MOV} may be assembled to one of several different
-machine instructions depending on the value
-
-@item N
-Integer constant that is valid as an immediate operand in a 64-bit @code{MOV}
-pseudo instruction
-
-@item S
-An absolute symbolic address or a label reference
-
-@item Y
-Floating point constant zero
-
-@item Z
-Integer constant zero
-
-@item Usa
-An absolute symbolic address
-
-@item Ush
-The high part (bits 12 and upwards) of the pc-relative address of a symbol
-within 4GB of the instruction
-
-@item Q
-A memory address which uses a single base register with no offset
-
-@item Ump
-A memory address suitable for a load/store pair instruction in SI, DI, SF and
-DF modes
-
-@end table
-
 @item ARM family---@file{config/arm/arm.h}
 @table @code
 @item f
 Floating-point register
@@ -4791,12 +4735,8 @@
 @item @samp{vashl@var{m}3}, @samp{vashr@var{m}3}, @samp{vlshr@var{m}3}, @samp{vrotl@var{m}3}, @samp{vrotr@var{m}3}
 Vector shift and rotate instructions that take vectors as operand 2
 instead of a scalar type.
 
-@cindex @code{bswap@var{m}2} instruction pattern
-@item @samp{bswap@var{m}2}
-Reverse the order of bytes of operand 1 and store the result in operand 0.
-
 @cindex @code{neg@var{m}2} instruction pattern
 @cindex @code{ssneg@var{m}2} instruction pattern
 @cindex @code{usneg@var{m}2} instruction pattern
 @item @samp{neg@var{m}2}, @samp{ssneg@var{m}2}, @samp{usneg@var{m}2}
@@ -8947,9 +8887,8 @@
 
 @menu
 * Mode Iterators::         Generating variations of patterns for different modes.
 * Code Iterators::         Doing the same for codes.
-* Int Iterators::          Doing the same for integers.
 @end menu
 
 @node Mode Iterators
 @subsection Mode Iterators
@@ -9219,82 +9158,5 @@
 
 @dots{}
 @end smallexample
 
-@node Int Iterators
-@subsection Int Iterators
-@cindex int iterators in @file{.md} files
-@findex define_int_iterator
-@findex define_int_attr
-
-Int iterators operate in a similar way to code iterators.  @xref{Code Iterators}.
-
-The construct:
-
-@smallexample
-(define_int_iterator @var{name} [(@var{int1} "@var{cond1}") @dots{} (@var{intn} "@var{condn}")])
-@end smallexample
-
-defines a pseudo integer constant @var{name} that can be instantiated as
-@var{inti} if condition @var{condi} is true.  Each @var{int}
-must have the same rtx format.  @xref{RTL Classes}. Int iterators can appear
-in only those rtx fields that have 'i' as the specifier. This means that
-each @var{int} has to be a constant defined using define_constant or
-define_c_enum.
-
-As with mode and code iterators, each pattern that uses @var{name} will be
-expanded @var{n} times, once with all uses of @var{name} replaced by
-@var{int1}, once with all uses replaced by @var{int2}, and so on.
-@xref{Defining Mode Iterators}.
-
-It is possible to define attributes for ints as well as for codes and modes.
-Attributes are defined using:
-
-@smallexample
-(define_int_attr @var{name} [(@var{int1} "@var{value1}") @dots{} (@var{intn} "@var{valuen}")])
-@end smallexample
-
-Here's an example of int iterators in action, taken from the ARM port:
-
-@smallexample
-(define_int_iterator QABSNEG [UNSPEC_VQABS UNSPEC_VQNEG])
-
-(define_int_attr absneg [(UNSPEC_VQABS "abs") (UNSPEC_VQNEG "neg")])
-
-(define_insn "neon_vq<absneg><mode>"
-  [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
-	(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
-		       (match_operand:SI 2 "immediate_operand" "i")]
-		      QABSNEG))]
-  "TARGET_NEON"
-  "vq<absneg>.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
-  [(set_attr "neon_type" "neon_vqneg_vqabs")]
-)
-
-@end smallexample
-
-This is equivalent to:
-
-@smallexample
-(define_insn "neon_vqabs<mode>"
-  [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
-	(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
-		       (match_operand:SI 2 "immediate_operand" "i")]
-		      UNSPEC_VQABS))]
-  "TARGET_NEON"
-  "vqabs.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
-  [(set_attr "neon_type" "neon_vqneg_vqabs")]
-)
-
-(define_insn "neon_vqneg<mode>"
-  [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
-	(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
-		       (match_operand:SI 2 "immediate_operand" "i")]
-		      UNSPEC_VQNEG))]
-  "TARGET_NEON"
-  "vqneg.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
-  [(set_attr "neon_type" "neon_vqneg_vqabs")]
-)
-
-@end smallexample
-
 @end ifset
Only in gcc/src/gcc/doc: rebuild-gcj-db.1
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/sourcebuild.texi gcc/src/gcc/doc/sourcebuild.texi
--- gcc-compare/gcc-current/gcc/doc/sourcebuild.texi	2013-07-04 23:23:26.916639531 +0100
+++ gcc/src/gcc/doc/sourcebuild.texi	2011-07-25 17:44:22.000000000 +0100
@@ -1501,21 +1501,13 @@
 
 @item arm_neon_hw
 Test system supports executing NEON instructions.
 
-@item arm_neonv2_hw
-Test system supports executing NEON v2 instructions.
-
 @item arm_neon_ok
 @anchor{arm_neon_ok}
 ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible
 options.  Some multilibs may be incompatible with these options.
 
-@item arm_neonv2_ok
-@anchor{arm_neon2_ok}
-ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible
-options.  Some multilibs may be incompatible with these options.
-
 @item arm_neon_fp16_ok
 @anchor{arm_neon_fp16_ok}
 ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible
 options.  Some multilibs may be incompatible with these options.
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/tm.texi gcc/src/gcc/doc/tm.texi
--- gcc-compare/gcc-current/gcc/doc/tm.texi	2013-07-04 23:23:26.920639531 +0100
+++ gcc/src/gcc/doc/tm.texi	2012-08-10 14:21:31.000000000 +0100
@@ -9494,12 +9494,8 @@
 @deftypevr {Target Hook} bool TARGET_WANT_DEBUG_PUB_SECTIONS
 True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections should be emitted.  These sections are not used on most platforms, and in particular GDB does not use them.
 @end deftypevr
 
-@deftypevr {Target Hook} bool TARGET_FORCE_AT_COMP_DIR
-True if the @code{DW_AT_comp_dir} attribute should be emitted for each  compilation unit.  This attribute is required for the darwin linker  to emit debug information.
-@end deftypevr
-
 @deftypevr {Target Hook} bool TARGET_DELAY_SCHED2
 True if sched2 is not to be run at its normal place.  This usually means it will be run as part of machine-specific reorg.
 @end deftypevr
 
diff -r -U 4 gcc-compare/gcc-current/gcc/doc/tm.texi.in gcc/src/gcc/doc/tm.texi.in
--- gcc-compare/gcc-current/gcc/doc/tm.texi.in	2013-07-04 23:23:26.916639531 +0100
+++ gcc/src/gcc/doc/tm.texi.in	2012-08-10 14:21:31.000000000 +0100
@@ -9387,10 +9387,8 @@
 @end defmac
 
 @hook TARGET_WANT_DEBUG_PUB_SECTIONS
 
-@hook TARGET_FORCE_AT_COMP_DIR
-
 @hook TARGET_DELAY_SCHED2
 
 @hook TARGET_DELAY_VARTRACK
 
diff -r -U 4 gcc-compare/gcc-current/gcc/fortran/ChangeLog gcc/src/gcc/fortran/ChangeLog
--- gcc-compare/gcc-current/gcc/fortran/ChangeLog	2013-07-04 23:23:26.972639532 +0100
+++ gcc/src/gcc/fortran/ChangeLog	2013-07-04 23:25:30.124642584 +0100
@@ -1,4 +1,13 @@
+2013-06-06  Tobias Burnus  <burnus@net-b.de>
+
+	Backport from mainline
+	2012-08-27  Tobias Burnus  <burnus@net-b.de>
+
+	PR fortran/54370
+	* trans-stmt.c (gfc_trans_do_while): Don't change the logical
+	kind for negation of the condition.
+
 2013-06-01  Janus Weil  <janus@gcc.gnu.org>
 	    Tobias Burnus  <burnus@net-b.de>
 
 	PR fortran/57217
Only in gcc/src/gcc/fortran: gfortran.info
diff -r -U 4 gcc-compare/gcc-current/gcc/fortran/trans-stmt.c gcc/src/gcc/fortran/trans-stmt.c
--- gcc-compare/gcc-current/gcc/fortran/trans-stmt.c	2013-07-04 23:23:26.976639533 +0100
+++ gcc/src/gcc/fortran/trans-stmt.c	2013-07-04 23:25:30.124642584 +0100
@@ -1742,9 +1742,9 @@
   gfc_init_se (&cond, NULL);
   gfc_conv_expr_val (&cond, code->expr1);
   gfc_add_block_to_block (&block, &cond.pre);
   cond.expr = fold_build1_loc (code->expr1->where.lb->location,
-			       TRUTH_NOT_EXPR, boolean_type_node, cond.expr);
+			       TRUTH_NOT_EXPR, TREE_TYPE (cond.expr), cond.expr);
 
   /* Build "IF (! cond) GOTO exit_label".  */
   tmp = build1_v (GOTO_EXPR, exit_label);
   TREE_USED (exit_label) = 1;
Only in gcc/src/gcc: gengtype-lex.c
diff -r -U 4 gcc-compare/gcc-current/gcc/LINARO-VERSION gcc/src/gcc/LINARO-VERSION
--- gcc-compare/gcc-current/gcc/LINARO-VERSION	2013-07-04 23:23:26.944639532 +0100
+++ gcc/src/gcc/LINARO-VERSION	2013-07-04 23:25:30.064642583 +0100
@@ -1 +1 @@
-4.7-2013.06-1
+4.7-2013.05-1~dev
Only in gcc/src/gcc/po: be.gmo
Only in gcc/src/gcc/po: da.gmo
Only in gcc/src/gcc/po: de.gmo
Only in gcc/src/gcc/po: el.gmo
Only in gcc/src/gcc/po: es.gmo
Only in gcc/src/gcc/po: fi.gmo
Only in gcc/src/gcc/po: fr.gmo
Only in gcc/src/gcc/po: hr.gmo
Only in gcc/src/gcc/po: id.gmo
Only in gcc/src/gcc/po: ja.gmo
Only in gcc/src/gcc/po: nl.gmo
Only in gcc/src/gcc/po: ru.gmo
Only in gcc/src/gcc/po: sr.gmo
Only in gcc/src/gcc/po: sv.gmo
Only in gcc/src/gcc/po: tr.gmo
Only in gcc/src/gcc/po: vi.gmo
Only in gcc/src/gcc/po: zh_CN.gmo
Only in gcc/src/gcc/po: zh_TW.gmo
diff -r -U 4 gcc-compare/gcc-current/gcc/testsuite/ChangeLog gcc/src/gcc/testsuite/ChangeLog
--- gcc-compare/gcc-current/gcc/testsuite/ChangeLog	2013-07-04 23:23:26.980639533 +0100
+++ gcc/src/gcc/testsuite/ChangeLog	2013-07-04 23:25:30.120642584 +0100
@@ -1,4 +1,17 @@
+2013-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/57568
+	* gcc.c-torture/execute/pr57568.c: New test.
+
+2013-06-06  Tobias Burnus  <burnus@net-b.de>
+
+	Backport from mainline
+	2012-08-27  Tobias Burnus  <burnus@net-b.de>
+
+	PR fortran/54370
+	* gfortran.dg/do_5.f90: New.
+
 2013-06-01  Janus Weil  <janus@gcc.gnu.org>
 	    Tobias Burnus  <burnus@net-b.de>
 
 	PR fortran/57217
Only in gcc/src/gcc/testsuite/gcc.c-torture/execute: pr57568.c
Only in gcc/src/gcc/testsuite/gfortran.dg: do_5.f90
Only in gcc-compare/gcc-current/: .git
Only in gcc/src/: LAST_UPDATED
Only in gcc/src/libcpp: autom4te.cache
Only in gcc/src/libcpp/po: be.gmo
Only in gcc/src/libcpp/po: ca.gmo
Only in gcc/src/libcpp/po: da.gmo
Only in gcc/src/libcpp/po: de.gmo
Only in gcc/src/libcpp/po: el.gmo
Only in gcc/src/libcpp/po: eo.gmo
Only in gcc/src/libcpp/po: es.gmo
Only in gcc/src/libcpp/po: fi.gmo
Only in gcc/src/libcpp/po: fr.gmo
Only in gcc/src/libcpp/po: id.gmo
Only in gcc/src/libcpp/po: ja.gmo
Only in gcc/src/libcpp/po: nl.gmo
Only in gcc/src/libcpp/po: ru.gmo
Only in gcc/src/libcpp/po: sr.gmo
Only in gcc/src/libcpp/po: sv.gmo
Only in gcc/src/libcpp/po: tr.gmo
Only in gcc/src/libcpp/po: uk.gmo
Only in gcc/src/libcpp/po: vi.gmo
Only in gcc/src/libcpp/po: zh_CN.gmo
Only in gcc/src/libcpp/po: zh_TW.gmo
Only in gcc/src/libffi: autom4te.cache
diff -r -U 4 gcc-compare/gcc-current/libgcc/ChangeLog gcc/src/libgcc/ChangeLog
--- gcc-compare/gcc-current/libgcc/ChangeLog	2013-07-04 23:23:26.776639528 +0100
+++ gcc/src/libgcc/ChangeLog	2013-07-04 23:25:30.120642584 +0100
@@ -1,4 +1,17 @@
+2013-06-08  Walter Lee  <walt@tilera.com>
+
+	Backport from mainline:
+	2013-06-08  Walter Lee  <walt@tilera.com>
+	
+	* config/tilepro/atomic.h: Don't include stdint.h or features.h.
+	Replace int64_t with long long.  Add __extension__ where
+	appropriate.
+
+2013-06-06  Douglas B Rupp  <rupp@adacore.com>
+
+	* config.host (arm-wrs-vxworks): Configure with other soft float.
+
 2013-05-20  Chung-Ju Wu  <jasonwucj@gmail.com>
 
 	Backport from mainline:
 	2012-05-24  Olivier Hainque  <hainque@adacore.com>
diff -r -U 4 gcc-compare/gcc-current/libgcc/config/tilepro/atomic.h gcc/src/libgcc/config/tilepro/atomic.h
--- gcc-compare/gcc-current/libgcc/config/tilepro/atomic.h	2013-07-04 23:23:26.784639528 +0100
+++ gcc/src/libgcc/config/tilepro/atomic.h	2013-07-04 23:25:30.120642584 +0100
@@ -1,7 +1,6 @@
 /* Macros for atomic functionality for tile.
-   Copyright (C) 2011, 2012
-   Free Software Foundation, Inc.
+   Copyright (C) 2011-2013 Free Software Foundation, Inc.
    Contributed by Walter Lee (walt@tilera.com)
 
    This file is free software; you can redistribute it and/or modify it
    under the terms of the GNU General Public License as published by the
@@ -92,10 +91,8 @@
    routines are implemented by looping over the 64-bit
    compare-and-exchange routine, so may be potentially less efficient.  */
 #endif
 
-#include <stdint.h>
-#include <features.h>
 #ifdef __tilegx__
 #include <arch/spr_def.h>
 #else
 #include <asm/unistd.h>
@@ -122,11 +119,11 @@
 }
 
 /* 64-bit integer compare-and-exchange.  */
 static __inline __attribute__ ((always_inline))
-     int64_t arch_atomic_val_compare_and_exchange_8 (volatile int64_t * mem,
-						     int64_t oldval,
-						     int64_t newval)
+     long long arch_atomic_val_compare_and_exchange_8 (volatile long long
+						       *mem, long long oldval,
+						       long long newval)
 {
 #ifdef __tilegx__
   __insn_mtspr (SPR_CMPEXCH_VALUE, oldval);
   return __insn_cmpexch (mem, newval);
@@ -139,9 +136,9 @@
 			"R02" (oldval_lo), "R03" (oldval_hi),
 			"R04" (newval_lo), "R05" (newval_hi),
 			"m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25",
 			"r26", "r27", "r28", "r29", "memory");
-  return ((uint64_t) result_hi) << 32 | result_lo;
+  return ((long long) result_hi) << 32 | result_lo;
 #endif
 }
 
 /* This non-existent symbol is called for sizes other than "4" and "8",
@@ -150,13 +147,13 @@
   __attribute__ ((warning ("sizeof atomic argument not 4 or 8")));
 
 
 #define arch_atomic_val_compare_and_exchange(mem, o, n)                 \
-  ({                                                                    \
+  __extension__ ({                                                      \
     (__typeof(*(mem)))(__typeof(*(mem)-*(mem)))                         \
       ((sizeof(*(mem)) == 8) ?                                          \
        arch_atomic_val_compare_and_exchange_8(                          \
-         (volatile int64_t*)(mem), (__typeof((o)-(o)))(o),              \
+         (volatile long long*)(mem), (__typeof((o)-(o)))(o),            \
          (__typeof((n)-(n)))(n)) :                                      \
        (sizeof(*(mem)) == 4) ?                                          \
        arch_atomic_val_compare_and_exchange_4(                          \
          (volatile int*)(mem), (__typeof((o)-(o)))(o),                  \
@@ -164,9 +161,9 @@
        __arch_atomic_error_bad_argument_size());                        \
   })
 
 #define arch_atomic_bool_compare_and_exchange(mem, o, n)                \
-  ({                                                                    \
+  __extension__ ({                                                      \
     __typeof(o) __o = (o);                                              \
     __builtin_expect(                                                   \
       __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \
   })
@@ -174,9 +171,9 @@
 
 /* Loop with compare_and_exchange until we guess the correct value.
    Normally "expr" will be an expression using __old and __value.  */
 #define __arch_atomic_update_cmpxchg(mem, value, expr)                  \
-  ({                                                                    \
+  __extension__ ({                                                      \
     __typeof(value) __value = (value);                                  \
     __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess;           \
     do {                                                                \
       __guess = __old;                                                  \
@@ -189,14 +186,16 @@
 
 /* Generic atomic op with 8- or 4-byte variant.
    The _mask, _addend, and _expr arguments are ignored on tilegx.  */
 #define __arch_atomic_update(mem, value, op, _mask, _addend, _expr)     \
-  ({                                                                    \
+  __extension__ ({                                                      \
     ((__typeof(*(mem)))                                                 \
      ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op(     \
-        (void *)(mem), (int64_t)(__typeof((value)-(value)))(value)) :   \
+        (volatile void *)(mem),                                         \
+        (long long)(__typeof((value)-(value)))(value)) :                \
       (sizeof(*(mem)) == 4) ? (int)__insn_##op##4(                      \
-        (void *)(mem), (int32_t)(__typeof((value)-(value)))(value)) :   \
+        (volatile void *)(mem),                                         \
+        (int)(__typeof((value)-(value)))(value)) :                      \
       __arch_atomic_error_bad_argument_size()));                        \
   })
 
 #else
@@ -224,9 +223,9 @@
 
 /* Generic atomic op with 8- or 4-byte variant.
    The _op argument is ignored on tilepro.  */
 #define __arch_atomic_update(mem, value, _op, mask, addend, expr)       \
-  ({                                                                    \
+  __extension__ ({                                                      \
     (__typeof(*(mem)))(__typeof(*(mem)-*(mem)))                         \
       ((sizeof(*(mem)) == 8) ?                                          \
        __arch_atomic_update_cmpxchg((mem), (value), (expr)) :           \
        (sizeof(*(mem)) == 4) ?                                          \
@@ -263,15 +262,15 @@
 #define arch_atomic_nand(mem, mask) \
   __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value))
 
 #define arch_atomic_bit_set(mem, bit)                                   \
-  ({                                                                    \
+  __extension__ ({                                                      \
     __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit);             \
     __mask & arch_atomic_or((mem), __mask);                             \
   })
 
 #define arch_atomic_bit_clear(mem, bit)                                 \
-  ({                                                                    \
+  __extension__ ({                                                      \
     __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit);             \
     __mask & arch_atomic_and((mem), ~__mask);                           \
   })
 
diff -r -U 4 gcc-compare/gcc-current/libgcc/config.host gcc/src/libgcc/config.host
--- gcc-compare/gcc-current/libgcc/config.host	2013-07-04 23:23:26.800639528 +0100
+++ gcc/src/libgcc/config.host	2013-07-04 23:25:30.120642584 +0100
@@ -327,9 +327,9 @@
 	extra_parts="$extra_parts vms-dwarf2.o vms-dwarf2eh.o"
 	md_unwind_header=alpha/vms-unwind.h
 	;;
 arm-wrs-vxworks)
-	tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit"
+	tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
 	extra_parts="$extra_parts crti.o crtn.o"
 	;;
 arm*-*-freebsd*)
 	tmake_file="$tmake_file arm/t-arm arm/t-strongarm-elf t-fdpbit"
Only in gcc/src/libgo: autom4te.cache
diff -r -U 4 gcc-compare/gcc-current/libgomp/env.c gcc/src/libgomp/env.c
--- gcc-compare/gcc-current/libgomp/env.c	2013-07-04 23:23:27.660639549 +0100
+++ gcc/src/libgomp/env.c	2013-07-04 23:25:30.140642585 +0100
@@ -41,8 +41,9 @@
 #   include <strings.h>
 #  endif
 # endif
 #endif
+#include <sys/mman.h>
 #include <limits.h>
 #include <errno.h>
 
 #ifndef HAVE_STRTOULL
Only in gcc/src/libgomp: libgomp.info
Only in gcc/src/libitm: libitm.info
Only in gcc/src/libjava: autom4te.cache
Only in gcc/src/libjava/classpath: autom4te.cache
Only in gcc/src/libjava/classpath/doc: cp-tools.info
Only in gcc/src/libjava/classpath/doc: gappletviewer.1
Only in gcc/src/libjava/classpath/doc: gjar.1
Only in gcc/src/libjava/classpath/doc: gjarsigner.1
Only in gcc/src/libjava/classpath/doc: gjavah.1
Only in gcc/src/libjava/classpath/doc: gjdoc.1
Only in gcc/src/libjava/classpath/doc: gkeytool.1
Only in gcc/src/libjava/classpath/doc: gnative2ascii.1
Only in gcc/src/libjava/classpath/doc: gorbd.1
Only in gcc/src/libjava/classpath/doc: grmid.1
Only in gcc/src/libjava/classpath/doc: grmiregistry.1
Only in gcc/src/libjava/classpath/doc: gserialver.1
Only in gcc/src/libjava/classpath/doc: gtnameserv.1
Only in gcc/src/libquadmath: libquadmath.info
Only in gcc/src/libstdc++-v3: autom4te.cache
diff -r -U 4 gcc-compare/gcc-current/maintainer-scripts/gcc_release gcc/src/maintainer-scripts/gcc_release
--- gcc-compare/gcc-current/maintainer-scripts/gcc_release	2013-07-04 23:23:28.500639570 +0100
+++ gcc/src/maintainer-scripts/gcc_release	2013-07-04 23:25:30.108642584 +0100
@@ -143,9 +143,9 @@
     rm -rf ${SOURCE_DIRECTORY}
   fi
 
   # Tag the sources.
-  if [ -n "${TAG}" ]; then
+  if false || [ -n "${TAG}" ]; then
     inform "Tagging sources as ${TAG}"
     # We don't want to overwrite an existing tag.  So, if the tag
     # already exists, issue an error message; the release manager can
     # manually remove the tag if appropriate.
@@ -156,15 +156,16 @@
     ${SVN} -m "Tagging source as ${TAG}" cp "${SVNROOT}/${SVNBRANCH}" "${SVNROOT}/${TAG}" || \
       error "Could not tag sources"
     SVNBRANCH=${TAG}
   fi
-  SVNREV=`${SVN} info "${SVNROOT}/${SVNBRANCH}"|awk '/Revision:/ {print $2}'`
+  #SVNREV=`${SVN} info "${SVNROOT}/${SVNBRANCH}"|awk '/Revision:/ {print $2}'`
 
   # Export the current sources.
-  inform "Retrieving sources (svn export -r ${SVNREV} ${SVNROOT}/${SVNBRANCH})"
+  inform "Copying sources (cp -a /scratch/packages/gcc/bzr/4.7 ...)"
 
-  ${SVN} -q export -r${SVNREV} "${SVNROOT}/${SVNBRANCH}" "`basename ${SOURCE_DIRECTORY}`" ||\
-    error "Could not retrieve sources"
+  #${SVN} -q export -r${SVNREV} "${SVNROOT}/${SVNBRANCH}" "`basename ${SOURCE_DIRECTORY}`" ||\
+  #  error "Could not retrieve sources"
+  cp -a /scratch/packages/gcc/bzr/4.7 "`basename ${SOURCE_DIRECTORY}`"
 
   # Run gcc_update on them to set up the timestamps nicely, and (re)write
   # the LAST_UPDATED file containing the SVN tag/revision used.
   changedir "gcc-${RELEASE}"
@@ -183,10 +184,10 @@
     export DESTDIR
     ${SOURCE_DIRECTORY}/gcc/doc/install.texi2html
 
     # Regenerate the NEWS file.
-    contrib/gennews > NEWS || \
-      error "Could not regenerate NEWS files"
+    #contrib/gennews > NEWS || \
+    #  error "Could not regenerate NEWS files"
 
     # Now, we must build the compiler in order to create any generated
     # files that are supposed to go in the source directory.  This is
     # also a good sanity check to make sure that the release builds
Only in gcc/src/: MD5SUMS
Only in gcc/src/: NEWS
