# This is the configuration file for SET_MMU.PRG, and must be located in either
# the root directory of the boot drive or in the autofolder.

# Split RAM into ST and TT RAM
split_ram=yes

# "pagesize" can be either 4k for 4k pages or 8k for ..eh.. 8k pages.
pagesize=4k

# With the "cacr" variable you set the cacr cpu register.
# The following are the following flags you can use...
#
# edc  - Enable Data Cache
# nad  - No Allocate Mode (data cache)
# esb  - Enable Store Buffer
# dpi  - Disable CPUSH Invalidation
# foc  - 1/2 cache operation mode enable (data cache)
# ebc  - Enable Branch Cache
# cabc - Clear all entries in the branch cache
# cubc - Clear all user entries in the branch cache
# eic  - Enable Instruction cache
# nai  - No Allocation Mode (instruction cache)
# fic  - 1/2 cache operation mode enable (instruction cache)
cacr=edc,esb,ebc,cabc,eic

# itt0, dtt0, itt1 and dtt1 sets the cpu registers with the same name to the
# value give here. These are the "Transparent Translation Registers".
# Since we are covering everything in the tree, we turn Trasparent Translation off.
# This also fixes (I hope) the problems that Mach64 users have had.
itt0=$0
dtt0=$0
itt1=$0
dtt1=$0

# To define a block of logical addressing area, used to build the translation
# tree, the following variables are used for each block you wich to define.
# logical  - The logical start address of the block to define
# physical - The physical start address of the block. The logical and physical
#            addresses are set equal in most cases. The CPU always uses logical
#            addresses to access memory, and then uses to tranlation tree to
#            obtain the actual physical address of that memory.
# size     - The size of the block.
# pd_flags - This is used to set initial flags in the page descriptors, as the
#            tree is built. For example  the caching mode is set using this flag.
# These are the following flags you can use with pd_flags. It is highly
# recommended you only use this to set the cache-mode, unless you know what you
# do!
#
# - The following flags are understood, but not used! pdt_r1 is always forced
# - into the pdt field of page descriptors. Also, SET_MMU can not create
# - indirect page descriptors at this time!
#
# pdt_iv    - Page Descriptor Type = invalid  ( %00 )
# pdt_r1    - ------- "" --------  = Resident ( %01 ) This is the pdt value set
#                                                     by SET_MMU.
# pdt_r2    - ------- "" --------  = Resident ( %11 )
# pdt_id    - ------- "" --------  = Indirect ( %10 )
#
# - The following flags can all be set at will, but dont do that unless you know
# - why you do it ;-)
#
# wp            - Write Protect, the Page is write protected
# used          - Used.
# modified      - Modified.
# super         - Page is supervisor accessible only.
# upa_0 - upa_3 - Sets the user page attribute field to 0,1,2 or 3
# global        - Global.
# ur1/ur2       - Sets the User reserved bit 11 (ur1) and 12 (ur2).
#
# The we have the caching modes..
#
# c_wt   - Cachable, Writetrought. Sets Writetrought caching.
# c_cb   - Cachable, CopyBack. Sets Copyback caching.
# c_p    - Cache inhibit, Precise exception model.
# c_ip   - Cache inhibit, ImPrecise exception model.
#
# All logical address spaces not defined by these blocks are marked INVALID in
# the translation tree.
#
# IMPORTANT: There *MUST* be an empty line between translation definition blocks!!
#
# ST RAM.
logical=$0
physical=$0
size=14*1024*1024
pd_flags=c_wt

# TOS ROM
logical=$00e00000
physical=$00e00000
size=1024*1024
pd_flags=c_p

# I/O space
logical=$00f00000
physical=$00f00000
size=1024*1024
pd_flags=c_p

# Then we set up the block that define the FastRAM
# Currently it's set to 512 MB (see the size=512*... below)
logical=$01000000
physical=$01000000
size=512*1024*1024
pd_flags=c_wt

# mirror of 24-bit address space with upper 8 bits set
# mirror of ST-RAM (I doub't it's needed)
logical=$ff000000
physical=$ff000000
size=14*1024*1024
pd_flags=c_wt

# mirror of TOS ROM (I doub't it's needed)
logical=$ffe00000
physical=$ffe00000
size=1024*1024
pd_flags=c_p

# mirror of I/O space (the only required thing for backward/ST compatibility)
logical=$fff00000
physical=$fff00000
size=1024*1024
pd_flags=c_p
