# SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB)
# Copyright (c) 2024 Nvidia All rights reserved.

#cython: language_level=3

_MLX5DV_RES_TYPE_QP = MLX5DV_RES_TYPE_QP
_MLX5DV_RES_TYPE_RWQ = MLX5DV_RES_TYPE_RWQ
_MLX5DV_RES_TYPE_DBR = MLX5DV_RES_TYPE_DBR
_MLX5DV_RES_TYPE_SRQ = MLX5DV_RES_TYPE_SRQ
_MLX5DV_PP_ALLOC_FLAGS_DEDICATED_INDEX = MLX5DV_PP_ALLOC_FLAGS_DEDICATED_INDEX
_MLX5DV_UAR_ALLOC_TYPE_BF = MLX5DV_UAR_ALLOC_TYPE_BF
_MLX5DV_UAR_ALLOC_TYPE_NC = MLX5DV_UAR_ALLOC_TYPE_NC

MLX5DV_QUERY_PORT_VPORT_ = MLX5DV_QUERY_PORT_VPORT
MLX5DV_QUERY_PORT_VPORT_VHCA_ID_ = MLX5DV_QUERY_PORT_VPORT_VHCA_ID
MLX5DV_QUERY_PORT_VPORT_STEERING_ICM_RX_ = MLX5DV_QUERY_PORT_VPORT_STEERING_ICM_RX
MLX5DV_QUERY_PORT_VPORT_STEERING_ICM_TX_ = MLX5DV_QUERY_PORT_VPORT_STEERING_ICM_TX
MLX5DV_QUERY_PORT_VPORT_REG_C0_ = MLX5DV_QUERY_PORT_VPORT_REG_C0
MLX5DV_QUERY_PORT_ESW_OWNER_VHCA_ID_ = MLX5DV_QUERY_PORT_ESW_OWNER_VHCA_ID

MLX5DV_FLOW_TABLE_TYPE_RDMA_RX_ = MLX5DV_FLOW_TABLE_TYPE_RDMA_RX
MLX5DV_FLOW_TABLE_TYPE_RDMA_TX_ = MLX5DV_FLOW_TABLE_TYPE_RDMA_TX
MLX5DV_FLOW_TABLE_TYPE_NIC_RX_ = MLX5DV_FLOW_TABLE_TYPE_NIC_RX
MLX5DV_FLOW_TABLE_TYPE_NIC_TX_ = MLX5DV_FLOW_TABLE_TYPE_NIC_TX
MLX5DV_FLOW_TABLE_TYPE_FDB_ = MLX5DV_FLOW_TABLE_TYPE_FDB

MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2_ = \
    MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2
MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL_ = \
    MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL
MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2_ = \
    MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2
MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL_ = \
    MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL

MLX5DV_REG_DMABUF_ACCESS_DATA_DIRECT_ = MLX5DV_REG_DMABUF_ACCESS_DATA_DIRECT
