
From: tglx@linutronix.de

This patch fixes the Level4 changes for ARM.  Tested on CLPS711x (ARM720T)

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---

 25-akpm/arch/arm/mm/fault.c   |    4 ++--
 25-akpm/arch/arm/mm/mm-armv.c |   10 +++++-----
 25-akpm/include/asm-arm/tlb.h |    5 +++++
 3 files changed, 12 insertions(+), 7 deletions(-)

diff -puN arch/arm/mm/fault.c~4level-fixes-arm arch/arm/mm/fault.c
--- 25/arch/arm/mm/fault.c~4level-fixes-arm	2004-11-15 20:00:47.304606952 -0800
+++ 25-akpm/arch/arm/mm/fault.c	2004-11-15 20:00:47.311605888 -0800
@@ -33,7 +33,7 @@ void show_pte(struct mm_struct *mm, unsi
 	if (!mm)
 		mm = &init_mm;
 
-	printk(KERN_ALERT "pgd = %p\n", mm->pgd);
+	printk(KERN_ALERT "pgd = %p\n", mm->pml4);
 	pgd = pml4_pgd_offset(pml4_offset(mm, addr), addr);
 	printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd));
 
@@ -332,7 +332,7 @@ do_translation_fault(unsigned long addr,
 	 * FIXME: CP15 C1 is write only on ARMv3 architectures.
 	 */
 	pgd = cpu_get_pgd() + index;
-	pgd_k = init_mm.pgd + index;
+	pgd_k = (pgd_t *) init_mm.pml4 + index;
 
 	if (pgd_none(*pgd_k))
 		goto bad_area;
diff -puN arch/arm/mm/mm-armv.c~4level-fixes-arm arch/arm/mm/mm-armv.c
--- 25/arch/arm/mm/mm-armv.c~4level-fixes-arm	2004-11-15 20:00:47.306606648 -0800
+++ 25-akpm/arch/arm/mm/mm-armv.c	2004-11-15 20:00:47.312605736 -0800
@@ -139,7 +139,7 @@ static int __init noalign_setup(char *__
 
 __setup("noalign", noalign_setup);
 
-#define FIRST_KERNEL_PGD_NR	(FIRST_USER_PGD_NR + USER_PTRS_PER_PGD)
+#define FIRST_KERNEL_PGD_NR	(FIRST_USER_PGD_NR + USER_PGDS_IN_LAST_PML4)
 
 /*
  * need to get a 16k page for level 1
@@ -500,12 +500,12 @@ void setup_mm_for_reboot(char mode)
 	int i;
 	int cpu_arch = cpu_architecture();
 
-	if (current->mm && current->mm->pgd)
-		pgd = current->mm->pgd;
+	if (current->mm && current->mm->pml4)
+		pgd = (pgd_t *) current->mm->pml4;
 	else
-		pgd = init_mm.pgd;
+		pgd = (pgd_t *) init_mm.pml4;
 
-	for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++) {
+	for (i = 0; i < FIRST_USER_PGD_NR + USER_PGDS_IN_LAST_PML4; i++) {
 		pmdval = (i << PGDIR_SHIFT) |
 			 PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
 			 PMD_TYPE_SECT;
diff -puN include/asm-arm/tlb.h~4level-fixes-arm include/asm-arm/tlb.h
--- 25/include/asm-arm/tlb.h~4level-fixes-arm	2004-11-15 20:00:47.307606496 -0800
+++ 25-akpm/include/asm-arm/tlb.h	2004-11-15 20:00:47.312605736 -0800
@@ -91,4 +91,9 @@ tlb_is_full_mm(struct mmu_gather *tlb)
 #define pte_free_tlb(tlb,ptep)		pte_free(ptep)
 #define pmd_free_tlb(tlb,pmdp)		pmd_free(pmdp)
 
+#define pgd_free_tlb(tlb, pgdp)					\
+	do {							\
+		__pgd_free_tlb(tlb, pgdp);			\
+	} while (0)
+
 #endif
_
